Search - vhdl rs232

[VHDL-FPGA-Verilog] 232_receiver

Description: Rs232 receiver usage -Rs232 receiver usage
Platform: | Size: 1024 | Author: wei hi | Hits:

[VHDL-FPGA-Verilog] UART

Description: 用FPGA实现了RS232异步串行通信，所用语言是VHDL，另外本人还有Verilog的欢迎交流学习，根据RS232 异步串行通信来的帧格式，在FPGA发送模块中采用的每一帧格式为：1位开始位+8位数据位+1位奇校验位+1位停止位，波特率为2400。由设置的波特率可以算出分频系数，具体算法为分频系数X=CLK/(BOUND*2)。-Using FPGA to achieve the RS232 asynchronous serial communication, the language used is VHDL, In addition, I also welcome the exchange of learning Verilog, according to RS232 asynchronous serial communication to the frame format, in the FPGA module used to send each frame format : the beginning of a bit+ 8-bit data bit+ 1 bit odd parity bit+ 1 bit stop bit, baud rate for 2400. By setting the baud rate can be calculated at the frequency coefficient, the specific algorithm for the sub-frequency coefficient X = CLK/(BOUND* 2).
Platform: | Size: 1024 | Author: saibei007 | Hits:

[Com Port] uart(Verilog)

Description: RS232的verilog源代码,如果需要的可以-RS232 of Verilog source code, if necessary can be
Platform: | Size: 10240 | Author: 陈强 | Hits:

[Com Port] uart

Description: 基于MAXII的RS232串口通信程序.还有使用VB编写的上位机串口通信软件。-MAXII based on the RS232 serial communication program. There are prepared to use VB PC serial communication software.
Platform: | Size: 199680 | Author: 张勋 | Hits:

[VHDL-FPGA-Verilog] uart_v11

Description: uart串口的vhdl语言程序。本人调试过，非常好用-serial UART VHDL Language Program. I debug, and very easy to use
Platform: | Size: 43008 | Author: hjj | Hits:

[VHDL-FPGA-Verilog] RS232

Description: 本实验实现PS/2接口与RS-232接口的数据传输， PS/2键盘上按下按键，可以通过RS-232自动传送到主机的串口调试终端上（sscom32.exe）；并在数据接收区显示接收到的字符。串口调试终端的设置：波特率115200，一个停止位，无校验位。-Realize this experiment, PS/2 interface with RS-232 data interface, PS/2 keyboard to press the button, through RS-232 automatic transmission to the host serial debug terminal (sscom32.exe) and data receiving display received characters. Serial debug terminal settings: 115200 baud rate, one stop bit, no parity bit.
Platform: | Size: 730112 | Author: 李华 | Hits:

[VHDL-FPGA-Verilog] RS232

Description: RS232串口通信协议，verilog实现，通过FPGA完全调通。-RS232 serial communication protocol, verilog achieved entirely through the FPGA transfer pass.
Platform: | Size: 3072 | Author: dingsheng | Hits:

[VHDL-FPGA-Verilog] RS232_pro

Description: RS232 verilog coding 全参数化设计可以自己设定波特率时钟频率等完全FPGA实现调通-RS232 verilog coding the entire parametric design can set the baud rate clock frequency of FPGA to achieve complete transfer pass
Platform: | Size: 2048 | Author: dinsh | Hits:

[VHDL-FPGA-Verilog] top

Description: RS232串行通信，采用VHDL编程，由波特率发生器，接收器和发送器构成-RS232 serial communication using VHDL programming, by the baud rate generator, receiver and transmitter constitute
Platform: | Size: 1024 | Author: 幸运 | Hits:

[VHDL-FPGA-Verilog] 07_rs232_echo

Description: Controller RS232 in VHDL
Platform: | Size: 2048 | Author: darek | Hits:

[Software Engineering] Rs232Rxd

Description: Rs232 Receiver VHDL code
Platform: | Size: 1024 | Author: mohd | Hits:

[SCM] VHDL

Description: 数码管显示，温度传感，红外感应，流水灯蜂鸣器，PS2,RS232的相关VHDL程序，已经在MAX-IIEPM570开发板上测试成功-Digital display, temperature sensor, infrared sensor, water lights buzzer, PS2, RS232 relevant VHDL procedures have been developed at MAX-IIEPM570 the success of on-board test
Platform: | Size: 9216 | Author: 刘运学 | Hits:

[Com Port] uart_zhiwen

Description: RS232的UART编程，包括波特率发生器模块，串口接受模块，串口发送模块-RS232 programming the UART, including the baud rate generator module, serial module to receive, send serial module
Platform: | Size: 109568 | Author: zhangyi | Hits:

[Com Port] RS232_Controller

Description: This project is a RS232 Controller used to communicate two devices.
Platform: | Size: 505856 | Author: Arley | Hits:

[Other] RS232

Description: 关于RS232的VHDL程序，具体是什么还不是太清楚，不过程序还是可以借鉴-RS232 on the VHDL program, specifically what is not too clear, but the procedure can still learn from
Platform: | Size: 300032 | Author: y | Hits:

[VHDL-FPGA-Verilog] rs232

Description: fpga的串口读写程序，经硬件测试成功，波特率9600.可以改变分频值适应不同的时钟和波特率-fpga serial read and write procedures, by the hardware to test the success of 9600 baud rate. frequency value can be changed to adapt to a different clock and baud rate
Platform: | Size: 384000 | Author: cjy | Hits:

[VHDL-FPGA-Verilog] VHDLRS232_RS422

Description: VHDL写的RS232和RS485通信代码,很基础的一个工具-VHDL written RS232 and RS485 communication code, it is a tool based on
Platform: | Size: 583680 | Author: dvp | Hits:

[ARM-PowerPC-ColdFire-MIPS] RS232

Description: a good example of rs232 communication based on hdl language
Platform: | Size: 843776 | Author: hao3361 | Hits:

[VHDL-FPGA-Verilog] rs232

Description: 通过FPGA实现串口通信，结果在超级终端可见-Serial communication through the FPGA, the result can be seen in the HyperTerminal
Platform: | Size: 641024 | Author: chengliu | Hits:

[Com Port] rs232

Description: 这是cpld，EPM240数据通信rs232程序，希望与大家分享-This is cpld, EPM240 data communication rs232 procedure, hoping to share with you
Platform: | Size: 132096 | Author: 蓝风 | Hits:

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[VHDL-FPGA-Verilog] 232_receiver

[VHDL-FPGA-Verilog] UART

[Com Port] uart(Verilog)

[Com Port] uart

[VHDL-FPGA-Verilog] uart_v11

[VHDL-FPGA-Verilog] RS232

[VHDL-FPGA-Verilog] RS232

[VHDL-FPGA-Verilog] RS232_pro

[VHDL-FPGA-Verilog] top

[VHDL-FPGA-Verilog] 07_rs232_echo

[Software Engineering] Rs232Rxd

[SCM] VHDL

[Com Port] uart_zhiwen

[Com Port] RS232_Controller

[Other] RS232

[VHDL-FPGA-Verilog] rs232

[VHDL-FPGA-Verilog] VHDLRS232_RS422

[ARM-PowerPC-ColdFire-MIPS] RS232

[VHDL-FPGA-Verilog] rs232

[Com Port] rs232

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